/*
 * Copyright (C) ST-Ericsson SA 2011
 *
 * Author: Sebastien Pasdeloup <sebastien.pasdeloup-nonst@stericsson.com>
 * License terms: GNU General Public License (GPL) version 2
 */

#ifndef __MACH_IRQS_DB9540_H
#define __MACH_IRQS_DB9540_H

#define IRQ_AP9540_VSENSOR		(IRQ_SHPI_START + 30)
#define IRQ_AP9540_SLIMBUS0		(IRQ_SHPI_START + 101)
#define IRQ_AP9540_THSENS		(IRQ_SHPI_START + 102)
#define IRQ_AP9540_DDR0			(IRQ_SHPI_START + 103)
#define IRQ_AP9540_CTIEXTRIG0	(IRQ_SHPI_START + 111)
#define IRQ_AP9540_SGX			(IRQ_SHPI_START + 112)
#define IRQ_AP9540_CTIEXTRIG1	(IRQ_SHPI_START + 117)
#define IRQ_AP9540_C2C_GENO0	(IRQ_SHPI_START + 128)
#define IRQ_AP9540_C2C_GENO1	(IRQ_SHPI_START + 129)
#define IRQ_AP9540_C2C_GENO2	(IRQ_SHPI_START + 130)
#define IRQ_AP9540_C2C_GENO3	(IRQ_SHPI_START + 131)
#define IRQ_AP9540_C2C_GENO4	(IRQ_SHPI_START + 132)
#define IRQ_AP9540_C2C_GENO5	(IRQ_SHPI_START + 133)
#define IRQ_AP9540_C2C_GENO6	(IRQ_SHPI_START + 134)
#define IRQ_AP9540_C2C_GENO7	(IRQ_SHPI_START + 135)
#define IRQ_AP9540_C2C_GENO8	(IRQ_SHPI_START + 136)
#define IRQ_AP9540_C2C_GENO9	(IRQ_SHPI_START + 137)
#define IRQ_AP9540_C2C_GENO10	(IRQ_SHPI_START + 138)
#define IRQ_AP9540_C2C_GENO11	(IRQ_SHPI_START + 139)
#define IRQ_AP9540_C2C_GENO12	(IRQ_SHPI_START + 140)
#define IRQ_AP9540_C2C_GENO13	(IRQ_SHPI_START + 141)
#define IRQ_AP9540_C2C_GENO14	(IRQ_SHPI_START + 142)
#define IRQ_AP9540_C2C_GENO15	(IRQ_SHPI_START + 143)
#define IRQ_AP9540_C2C_GENO16	(IRQ_SHPI_START + 144)
#define IRQ_AP9540_C2C_GENO17	(IRQ_SHPI_START + 145)
#define IRQ_AP9540_C2C_GENO18	(IRQ_SHPI_START + 146)
#define IRQ_AP9540_C2C_GENO19	(IRQ_SHPI_START + 147)
#define IRQ_AP9540_C2C_GENO20	(IRQ_SHPI_START + 148)
#define IRQ_AP9540_C2C_GENO21	(IRQ_SHPI_START + 149)
#define IRQ_AP9540_C2C_GENO22	(IRQ_SHPI_START + 150)
#define IRQ_AP9540_C2C_GENO23	(IRQ_SHPI_START + 151)
#define IRQ_AP9540_C2C_GENO24	(IRQ_SHPI_START + 152)
#define IRQ_AP9540_C2C_GENO25	(IRQ_SHPI_START + 153)
#define IRQ_AP9540_C2C_GENO26	(IRQ_SHPI_START + 154)
#define IRQ_AP9540_C2C_GENO27	(IRQ_SHPI_START + 155)
#define IRQ_AP9540_C2C_GENO28	(IRQ_SHPI_START + 156)
#define IRQ_AP9540_C2C_GENO29	(IRQ_SHPI_START + 157)
#define IRQ_AP9540_C2C_GENO30	(IRQ_SHPI_START + 158)
#define IRQ_AP9540_C2C_GENO31	(IRQ_SHPI_START + 159)
#define IRQ_AP9540_C2C_IRQ0		(IRQ_SHPI_START + 160)
#define IRQ_AP9540_C2C_IRQ1		(IRQ_SHPI_START + 161)
#define IRQ_AP9540_HVA_ITS		(IRQ_SHPI_START + 162)
#define IRQ_AP9540_HVA_ERR		(IRQ_SHPI_START + 163)
#define IRQ_AP9540_C2C_G1		(IRQ_SHPI_START + 164)
#define IRQ_AP9540_C2C_DDR1		(IRQ_SHPI_START + 165)
#define IRQ_AP9540_C2C_SGX_IDLE	(IRQ_SHPI_START + 166)

#endif
