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#### 6.57.7 ARM ACLE Intrinsics

These built-in intrinsics for the ARMv8-A CRC32 extension are available when the `-march=armv8-a+crc` switch is used:

##### 6.57.7.1 CRC32 intrinsics

- uint32_t __crc32b (uint32_t, uint8_t)
  Form of expected instruction(s): `crc32b` r0`,` r0`,` r0

- uint32_t __crc32h (uint32_t, uint16_t)
  Form of expected instruction(s): `crc32h` r0`,` r0`,` r0

- uint32_t __crc32w (uint32_t, uint32_t)
  Form of expected instruction(s): `crc32w` r0`,` r0`,` r0

- uint32_t __crc32d (uint32_t, uint64_t)
  Form of expected instruction(s): Two `crc32w` r0`,` r0`,` r0 instructions for AArch32. One `crc32w` w0`,` w0`,` x0 instruction for AArch64.

- uint32_t __crc32cb (uint32_t, uint8_t)
  Form of expected instruction(s): `crc32cb` r0`,` r0`,` r0

- uint32_t __crc32ch (uint32_t, uint16_t)
  Form of expected instruction(s): `crc32ch` r0`,` r0`,` r0

- uint32_t __crc32cw (uint32_t, uint32_t)
  Form of expected instruction(s): `crc32cw` r0`,` r0`,` r0

- uint32_t __crc32cd (uint32_t, uint64_t)
  Form of expected instruction(s): Two `crc32cw` r0`,` r0`,` r0 instructions for AArch32. One `crc32cw` w0`,` w0`,` x0 instruction for AArch64.