/* Generated automatically by the program `genconstants'
   from the machine description file `md'.  */

#ifndef GCC_INSN_CONSTANTS_H
#define GCC_INSN_CONSTANTS_H

#define SFP_REGNUM 64
#define R12_REGNUM 12
#define CC_REGNUM 66
#define R29_REGNUM 29
#define R15_REGNUM 15
#define V15_REGNUM 47
#define R2_REGNUM 2
#define R22_REGNUM 22
#define R18_REGNUM 18
#define IP0_REGNUM 16
#define R5_REGNUM 5
#define R25_REGNUM 25
#define R11_REGNUM 11
#define V31_REGNUM 63
#define R9_REGNUM 9
#define V0_REGNUM 32
#define R14_REGNUM 14
#define SP_REGNUM 31
#define R10_REGNUM 10
#define R1_REGNUM 1
#define R21_REGNUM 21
#define R17_REGNUM 17
#define R20_REGNUM 20
#define R4_REGNUM 4
#define R24_REGNUM 24
#define R30_REGNUM 30
#define R8_REGNUM 8
#define R27_REGNUM 27
#define R13_REGNUM 13
#define AP_REGNUM 65
#define R0_REGNUM 0
#define R6_REGNUM 6
#define LR_REGNUM 30
#define R28_REGNUM 28
#define R16_REGNUM 16
#define R3_REGNUM 3
#define R23_REGNUM 23
#define R19_REGNUM 19
#define IP1_REGNUM 17
#define R7_REGNUM 7
#define R26_REGNUM 26

enum unspec {
  UNSPEC_CASESI = 0,
  UNSPEC_CRC32B = 1,
  UNSPEC_CRC32CB = 2,
  UNSPEC_CRC32CH = 3,
  UNSPEC_CRC32CW = 4,
  UNSPEC_CRC32CX = 5,
  UNSPEC_CRC32H = 6,
  UNSPEC_CRC32W = 7,
  UNSPEC_CRC32X = 8,
  UNSPEC_URECPE = 9,
  UNSPEC_FRECPE = 10,
  UNSPEC_FRECPS = 11,
  UNSPEC_FRECPX = 12,
  UNSPEC_FRINTA = 13,
  UNSPEC_FRINTI = 14,
  UNSPEC_FRINTM = 15,
  UNSPEC_FRINTN = 16,
  UNSPEC_FRINTP = 17,
  UNSPEC_FRINTX = 18,
  UNSPEC_FRINTZ = 19,
  UNSPEC_GOTSMALLPIC = 20,
  UNSPEC_GOTSMALLTLS = 21,
  UNSPEC_GOTTINYPIC = 22,
  UNSPEC_LD1 = 23,
  UNSPEC_LD2 = 24,
  UNSPEC_LD2_DUP = 25,
  UNSPEC_LD3 = 26,
  UNSPEC_LD3_DUP = 27,
  UNSPEC_LD4 = 28,
  UNSPEC_LD4_DUP = 29,
  UNSPEC_LD2_LANE = 30,
  UNSPEC_LD3_LANE = 31,
  UNSPEC_LD4_LANE = 32,
  UNSPEC_MB = 33,
  UNSPEC_NOP = 34,
  UNSPEC_PRLG_STK = 35,
  UNSPEC_RBIT = 36,
  UNSPEC_SISD_NEG = 37,
  UNSPEC_SISD_SSHL = 38,
  UNSPEC_SISD_USHL = 39,
  UNSPEC_SSHL_2S = 40,
  UNSPEC_ST1 = 41,
  UNSPEC_ST2 = 42,
  UNSPEC_ST3 = 43,
  UNSPEC_ST4 = 44,
  UNSPEC_ST2_LANE = 45,
  UNSPEC_ST3_LANE = 46,
  UNSPEC_ST4_LANE = 47,
  UNSPEC_TLS = 48,
  UNSPEC_TLSDESC = 49,
  UNSPEC_USHL_2S = 50,
  UNSPEC_VSTRUCTDUMMY = 51,
  UNSPEC_SP_SET = 52,
  UNSPEC_SP_TEST = 53,
  UNSPEC_ASHIFT_SIGNED = 54,
  UNSPEC_ASHIFT_UNSIGNED = 55,
  UNSPEC_ABS = 56,
  UNSPEC_FMAX = 57,
  UNSPEC_FMAXNMV = 58,
  UNSPEC_FMAXV = 59,
  UNSPEC_FMIN = 60,
  UNSPEC_FMINNMV = 61,
  UNSPEC_FMINV = 62,
  UNSPEC_FADDV = 63,
  UNSPEC_ADDV = 64,
  UNSPEC_SMAXV = 65,
  UNSPEC_SMINV = 66,
  UNSPEC_UMAXV = 67,
  UNSPEC_UMINV = 68,
  UNSPEC_SHADD = 69,
  UNSPEC_UHADD = 70,
  UNSPEC_SRHADD = 71,
  UNSPEC_URHADD = 72,
  UNSPEC_SHSUB = 73,
  UNSPEC_UHSUB = 74,
  UNSPEC_SRHSUB = 75,
  UNSPEC_URHSUB = 76,
  UNSPEC_ADDHN = 77,
  UNSPEC_RADDHN = 78,
  UNSPEC_SUBHN = 79,
  UNSPEC_RSUBHN = 80,
  UNSPEC_ADDHN2 = 81,
  UNSPEC_RADDHN2 = 82,
  UNSPEC_SUBHN2 = 83,
  UNSPEC_RSUBHN2 = 84,
  UNSPEC_SQDMULH = 85,
  UNSPEC_SQRDMULH = 86,
  UNSPEC_PMUL = 87,
  UNSPEC_USQADD = 88,
  UNSPEC_SUQADD = 89,
  UNSPEC_SQXTUN = 90,
  UNSPEC_SQXTN = 91,
  UNSPEC_UQXTN = 92,
  UNSPEC_SSRA = 93,
  UNSPEC_USRA = 94,
  UNSPEC_SRSRA = 95,
  UNSPEC_URSRA = 96,
  UNSPEC_SRSHR = 97,
  UNSPEC_URSHR = 98,
  UNSPEC_SQSHLU = 99,
  UNSPEC_SQSHL = 100,
  UNSPEC_UQSHL = 101,
  UNSPEC_SQSHRUN = 102,
  UNSPEC_SQRSHRUN = 103,
  UNSPEC_SQSHRN = 104,
  UNSPEC_UQSHRN = 105,
  UNSPEC_SQRSHRN = 106,
  UNSPEC_UQRSHRN = 107,
  UNSPEC_SSHL = 108,
  UNSPEC_USHL = 109,
  UNSPEC_SRSHL = 110,
  UNSPEC_URSHL = 111,
  UNSPEC_SQRSHL = 112,
  UNSPEC_UQRSHL = 113,
  UNSPEC_SSLI = 114,
  UNSPEC_USLI = 115,
  UNSPEC_SSRI = 116,
  UNSPEC_USRI = 117,
  UNSPEC_SSHLL = 118,
  UNSPEC_USHLL = 119,
  UNSPEC_ADDP = 120,
  UNSPEC_TBL = 121,
  UNSPEC_CONCAT = 122,
  UNSPEC_ZIP1 = 123,
  UNSPEC_ZIP2 = 124,
  UNSPEC_UZP1 = 125,
  UNSPEC_UZP2 = 126,
  UNSPEC_TRN1 = 127,
  UNSPEC_TRN2 = 128,
  UNSPEC_EXT = 129,
  UNSPEC_REV64 = 130,
  UNSPEC_REV32 = 131,
  UNSPEC_REV16 = 132,
  UNSPEC_AESE = 133,
  UNSPEC_AESD = 134,
  UNSPEC_AESMC = 135,
  UNSPEC_AESIMC = 136,
  UNSPEC_SHA1C = 137,
  UNSPEC_SHA1M = 138,
  UNSPEC_SHA1P = 139,
  UNSPEC_SHA1H = 140,
  UNSPEC_SHA1SU0 = 141,
  UNSPEC_SHA1SU1 = 142,
  UNSPEC_SHA256H = 143,
  UNSPEC_SHA256H2 = 144,
  UNSPEC_SHA256SU0 = 145,
  UNSPEC_SHA256SU1 = 146,
  UNSPEC_PMULL = 147,
  UNSPEC_PMULL2 = 148,
  UNSPEC_REV_REGLIST = 149,
  UNSPEC_VEC_SHR = 150
};
#define NUM_UNSPEC_VALUES 151
extern const char *const unspec_strings[];

enum unspecv {
  UNSPECV_EH_RETURN = 0,
  UNSPECV_GET_FPCR = 1,
  UNSPECV_SET_FPCR = 2,
  UNSPECV_GET_FPSR = 3,
  UNSPECV_SET_FPSR = 4,
  UNSPECV_LX = 5,
  UNSPECV_SX = 6,
  UNSPECV_LDA = 7,
  UNSPECV_STL = 8,
  UNSPECV_ATOMIC_CMPSW = 9,
  UNSPECV_ATOMIC_EXCHG = 10,
  UNSPECV_ATOMIC_CAS = 11,
  UNSPECV_ATOMIC_SWP = 12,
  UNSPECV_ATOMIC_OP = 13,
  UNSPECV_ATOMIC_LDOP = 14,
  UNSPECV_ATOMIC_LDOP_OR = 15,
  UNSPECV_ATOMIC_LDOP_BIC = 16,
  UNSPECV_ATOMIC_LDOP_XOR = 17,
  UNSPECV_ATOMIC_LDOP_PLUS = 18
};
#define NUM_UNSPECV_VALUES 19
extern const char *const unspecv_strings[];

#endif /* GCC_INSN_CONSTANTS_H */
